Digitization which is the recent tendency deeply spreads into information electric home appliances represented by sound equipments and image equipments. With the development of IC (integrated circuit) and the multimedia where communication and computers are united, the exchange of information between electronic equipments becomes easy. Particularly the digitization of television broadcasting which is a typical information electric home appliance, namely, digital television technique is not only wide-range television techniques such as process, transmission, recording and conversion of image/sound signals according to the digital process but also integrated techniques which makes full use of all the digital techniques such as data compression, code error correction.
Further, the digital television broadcasting has a background of MPEG2 which is a moving picture compressing technique adopted as the standard system in ITU (International Telecommunication Union). This technique makes integrated digital broadcasting including bi-directional data broadcasting and multi-channel by means of band compression possible. Therefore, in order to realize high-definition broadcasting in the digital television technique, it is desired to demodulate the I and Q channel signals which are continued from the prior analog television technique with higher reproducibility. In the case where a modulated signal is transmitted by radio communication via a satellite particularly like the television satellite broadcasting, a radio wave (carrier) is utilized as a carrier wave. Thus, quality of a transmission line in a transmission space is lowered due to weather or another influences, and a receiving state is occasionally deteriorated. Therefore, it is requested to improve reliability and stability of the demodulation process in the demodulation apparatus.
FIG. 1 is a block diagram showing a schematic structure of the prior demodulation apparatus. The demodulation apparatus 100 shown in FIG. 1 demodulates a modulated signal modulated by 4-phase PSK (hereinafter, QPSK). In FIG. 1, the demodulation apparatus 100 is composed of a semi synchronous orthogonal detection circuit 110 as a so-called tuner, A/D converters 131 and 132, a timing reproduction circuit 134, an amplitude comparator 136, a loop filter 138 and a carrier reproduction circuit 140.
The semi synchronous orthogonal detection circuit 110 detects a first signal (hereafter referred to as SI signal) on an I channel side and a second signal (hereafter referred to as also referred to as SQ signal) on a Q channel side from the modulated signal. The SI signal and the SQ signal are orthogonal. The semi synchronous orthogonal detection circuit 110 is composed of an amplifier 111 at the previous stage, an orthogonal phase detector 120, low-pass filters 113 and 115, and amplifiers 117 and 119 on the after stage. The amplifier 111 amplifies the modulated signal. The orthogonal phase detector 120 orthogonally detects the signals on the I channel side and Q channel side from the modulated signal output from the amplifier 111. The low-pass filters 113 and 115 remove harmonic components of the signals on the I channel side and Q channel side output from the orthogonal phase detector 120. The amplifiers 117 and 119 amplify individually the signals on the I and Q channel sides where their bandwidths are limited.
The orthogonal phase detector 120 is composed of a local oscillator 122, a multiplier 121, a phase shifter 125 and a multiplier 123. The local oscillator 122 oscillates the modulated signal with a fixed frequency (angular frequency: ωc+ωd) which is close to an original carrier wave frequency of the modulated signal (angular frequency: ωc). The multiplier 121 product-detects the signal on the I channel side from the modulated signal using the oscillation signal (cos[(ωc+ωd) t]) of the local oscillator 122. The phase shifter 125 shifts the phase of the oscillation signal of the local oscillator 122 by π/2 so as to output the oscillation signal. The multiplier 123 product-detects the signal on the Q channel side from the modulated signal using the oscillation signal (sin[(ωc+ωd) t]) output from the phase shifter 125.
The A/D converter 131 converts the SI signal output from the semi synchronous orthogonal detection circuit 110 into an I channel sample signal of a digital value. The A/D converter 132 converts the SQ signal into a Q channel sample signal of a digital value.
The timing reproduction circuit 134 fetches the SI signal and the SQ signal of the digital value from the I and Q channel sample signals output respectively from the A/D converters 131 and 132 with timing which synchronizes a base band signal. The amplitude comparator 136 calculates symbol amplitudes from the SI signal and the SQ signal of the digital value and outputs and the SQ signal of digital values output from the timing reproduction circuit 134. In the carrier reproduction circuit 140, a feedback loop is formed by a complex multiplier 142, a phase comparator 143, a loop filter 144, a numeric-control oscillator 145 and a sine-wave generator 146.
An operation of the demodulation apparatus 100 will be explained below. In FIG. 1, the modulated signal by QPSK is input into the amplifier 111 of the semi synchronous orthogonal detection circuit 110 via a not shown antenna. The modulated signal is amplified by suitable gain in the amplifier 111 so as to be input into the orthogonal phase detector 120.
The modulated signal amplified by the amplifier 111 is input into the multiplier 121 in the orthogonal phase detector 120. The modulated signal is multiplied by the oscillation signal (cos[(ωc+ωd) t]) output from the local oscillator 122 so that the signal on the I channel is extracted. Similarly, the amplified modulated signal is multiplied by the oscillation signal (sin[(ωc+ωd)t]) output from the phase shifter 125 so that the signal on the Q channel is extracted.
The signals on the I and Q channel sides output from the orthogonal phase detector 120 are input respectively into the low-pass filters 113 and 115. Their harmonic components are removed and the signals are input into the amplifiers 117 and 119. The signals on the I and Q channel sides input into the amplifiers 117 and 119 are amplified by equal gains so as to signals showing a difference between the calculated symbol amplitudes and a reference amplitude (hereinafter, amplitude difference signals).
FIG. 2 is a block diagram showing a schematic structure of the amplitude comparator in the prior demodulation apparatus. The amplitude comparator 136 has the structure shown in FIG. 2. The signal on the I channel side (here, the SI signal of digital value) and the signal on the Q channel signal (here, SQ signal of digital value) are inputted, and their amplitudes are vector-calculated by an amplitude arithmetic section 151 so that the symbol amplitudes are obtained. The signals showing the symbol amplitudes and an inverted signal of the reference amplitude showing the original amplitude of the modulated signal, that is a signal obtained by multiplying the reference amplitude by −1, are added by an addition section 152. Therefore, a difference between the signals showing these amplitudes is output as an amplitude compared result.
The loop filter 138 smoothes the signal showing the amplitude compared result output from the amplitude comparator 136 and inputs the smoothed result into the amplifier 111 of the semi synchronous orthogonal detection circuit 110.
The carrier reproduction circuit 140 corrects a phase difference, mentioned later, so as to extracts an I channel signal (I signal) and a Q channel signal (Q signal) of digital values which are final objects to be acquired from the SI signal be output as the SI signal and the SQ signal. In general, the SI signal and the SQ signal are represented by the following equations by using the I channel signal (I(t)) and the Q channel signal (Q(t)) which should be finally demodulated.SI=I(t)cos(ωdt)−Q(t)sin(ωdt)  (1)SQ=Q(t)cos(ωdt)+I(t)sin(ωdt)  (2)As understood from the oscillation angular frequency (ωc+ωd) of the local oscillator, ωd shows the difference between the angular frequency of the carrier wave and the angular frequency of the local oscillator.
The SI signal and the SQ signal are then input into the A/D converters 131 and 312 so as to be sampled and made to the quantum. These signals are converted respectively into the I channel sample signal and the Q channel sample signal of digital value. The I and Q channel sample signals are input into the timing reproduction circuit 134 and extracted at timing which synchronizes with a clock (symbol rate) of the base band signal so as to be outputted.
The signals on the I and Q channel sides of digital value output from the timing reproduction circuit 134 are input into the amplitude comparator 136 and further into the complex multiplier 142 of the carrier reproduction circuit 140. The signals on the I and Q channel sides input into the amplitude comparator 136 are input into the amplitude arithmetic section 151 so that the symbol amplitudes are calculated and the differences with the reference amplitude are calculated by the addition section 152. The calculated results are output as the amplitude compared results so as to be input into the loop filter 138 at the next stage.
The loop filter 138 smoothes the signals showing the amplitude compared results and inputs the results as control signals which can change the gains into the amplifier 111 of the semi synchronous orthogonal detection circuit 110. As a result, the semi synchronous orthogonal detection circuit 110, the A/D converters 131 and 132, the timing reproduction circuit 134, the amplitude comparator 136 and the loop filter 138 form the feedback loop. The symbol amplitudes, which are determined by the signals on the I and Q channel sides output from the timing reproduction circuit 134, are converged on the reference amplitude.
On the other hand, the signals on the I and Q channel sides, which are input into the complex multiplier 142 of the carrier reproduction circuit 140, are used for complex multiplication according to the following equations together with a cos (ωrt) signal and a sin (ωrt) signal of the angular frequency ωr output from the sine-wave generator 146, mentioned later. These signals are output as signals I′ (t) and Q′ (t).I′(t)=SIcos(ωrt)+SQsin(ωrt)  (3)Q′(t)=SQcos(ωrt)−SIsin (ωrt)  (4)
The signals I′ (t) and Q′ (t) output from the complex multiplier 142 are input into the phase comparator 143. The phase comparator 143 outputs a signal (hereinafter, phase difference signal) which is in accordance with a phase difference between these two signals. The phase difference signal output from the phase comparator 143 is smoothed in the loop filter 144 so as to be output as a signal showing an average value of a change amount in unit time (hereinafter, phase difference average signal).
The phase difference average signal output from the loop filter 144 is input into the numeric-control oscillator 145. The numeric-control oscillator 145 generates a signal corresponding to the phase difference average signal, namely, ωrt shown in the equations (1) and (2). The signal generated in the numeric-control oscillator 145 is input into the sine-wave generator 146. The sine-wave generator 146 inputs the cos(ωrt) signal and the sin(ωrt) signal of the angular frequency ωr into the complex multiplier 142.
Therefore, the feedback loop is formed in the carrier reproduction circuit 140. The oscillation angular frequency ωr of the sine-wave generator 146 is converged so as to coincide with the oscillation angular frequency ωd of the SI signal and the SQ signal obtained from the timing reproduction circuit 134. More concretely, as is clear from the following equations obtained from the above equations (1) to (4), the angular frequency ωr converges on ωd. The signals I′ (t) and Q′ (t) obtained from the complex multiplier 142 become the original I channel signal (I(t) signal) and the Q channel signal (Q(t) signal) included in the modulation signal. Therefore, the objective modulation of the I and Q channel signals is achieved.I′=SI cos(ωrt)+SQ sin(ωrt)=I(t)cos((ωd−ωr)t)−Q(t)sin((ωd−ωr)t)  (5)Q′=SQ cos(ωrt)−SI sin(ωrt=I(t)sin((ωd−ωr)t)+Q(t)cos((ωd−ωr)t)  (6)
FIG. 3A is a diagram showing the operation of the prior demodulation apparatus. This is constellation of QPSK obtained in the ideal demodulation. Namely, in the case where the angular frequency ωr converges on ωd in the equations (5) and (6), the symbols which are determined by the I and Q channel signals output from the complex multiplier 142 are specified on four positions as shown in FIG. 3A. These four positions shift by π/2 in the first to fourth quadrants, and shift by π/4 with respect to I and Q axes.
However, actually it is difficult to tightly hold the set phase amount in the phase shifter 125 of the semi synchronous orthogonal detection circuit 110. Normally, the phase amount slightly deviates from an objective value. For example, in the case where the phase amount π/2 deviates by θ [rad] in the phase shifter 125 shown in FIG. 1, the SI and SQ signals output from the amplifiers 117 and 119 are also different from the results shown in the equations (1) and (2). Therefore, these signals are represented by the following equations.SI=I(t)cos(ωdt)−Q(t)sin(ωdt)  (7)SQ=Q(t)cos(ωdt+θ)+I(t)sin(ωdt+θ)  (8)
Further, when these signals are subject to the complex arithmetic in the complex multiplier 142, results represented by the following equations are obtained.I′=(t)[cos(ωdt)cos(ωrt)+sin(ωdt+θ)sin(ωrt)]+Q(t) [cos(ωdt+θ)sin(ωrt)−sin(ωdt)sin(ωrt)]  (9)Q′=I(t)[sin(ωdt+θ)cos(ωrt)−cos(ωdt)sin(ωrt)]+Q(t)[sin(ωdt)sin(ωrt)+cos(ωdt+θ)sin(ωrt)]  (10)
Therefore, even if ωr=ωd is obtained by the feedback loop of the carrier reproduction circuit 140, the I′ and Q′ signals do not coincide with the I(t) and Q(t) signals. Thus, these symbols appear as orthogonal skew. FIG. 3B is a diagram of the constellation in this case. The symbols appear in positions which rotate around the symbols on the constellation (FIG. 3A) without skew. Therefore, there is a problem that the BER (Bit Error Rate) characteristic after the demodulation is deteriorated due to the orthogonal skew in the prior demodulation apparatus.
Further, if the gains of the amplifiers 117 and 119 which amplify the I and Q channel signals after the orthogonal phase detection are different from each other in the semi synchronous orthogonal detection circuit 110, the above skew occurs. Therefore, the constellation which is similar to that of FIG. 3B appears, and the demodulation characteristic is deteriorated.
This is caused by the following reason. The feedback loop formed by the amplitude comparator 136 and the loop filter 138 just utilizes the results (symbol amplitudes), which are obtained by the vector arithmetic of the amplitudes of the signals on the I and Q channel sides output from the timing reproduction circuit 134, as the signal which can change the gain of the amplifier 111 of the semi synchronous orthogonal detection circuit 110. The results do not correct shift of the characteristic between the amplifiers 117 and 119.
Further, in order to solve these problems, a comparatively large-sized equalizer circuit should be provided. Therefore, the circuit configuration becomes complicated, and this increases the cost.